Process Control & Inspection

KLA's process control monopoly is among the most defensible competitive positions in the semiconductor equipment industry. The company holds 56%+ overall market share with near-monopoly positions in critical sub-segments: approximately 85% in reticle inspection, approximately 60% in brightfield wafer inspection, and dominant positions in optical metrology. The moat deepens with each new node transition because KLA's tools are non-discretionary — fabs cannot skip inspection without catastrophic yield loss, and the cost of undetected defects rises exponentially at smaller geometries. Competitors Applied Materials (Hitachi High-Tech acquired), Onto Innovation, and Lasertec have niche positions but cannot match KLA's breadth across the full inspection and metrology workflow. KLA has spent decades building its optical inspection and pattern recognition capabilities, creating a compound knowledge advantage that new entrants cannot replicate.

Advanced packaging inspection is KLA's fastest-growing product category and a key growth driver for the inspection segment. Revenue surged 85% YoY to approximately $925M in FY2025, driven by the explosion of HBM (High Bandwidth Memory) stacking, chiplet integration, and 2.5D/3D packaging for AI accelerators. KLA adapted its wafer-level inspection and metrology tools for packaging applications, creating a competitive moat in a market that barely existed three years ago. Management expects mid-to-high teens percentage growth in FY2026. The advanced packaging inspection opportunity is directly tied to AI chip production: every NVIDIA H100/B200, every AMD MI300, and every Google TPU requires advanced packaging that must be inspected for defects. As HBM transitions from 8-high to 12-high stacking (and beyond), the inspection requirement per unit increases proportionally.

EUV metrology is a critical growth driver for KLA as the semiconductor industry transitions to 3nm, 2nm, and eventually sub-2nm nodes using EUV lithography. Each EUV layer requires additional metrology and inspection steps compared to DUV layers because EUV patterning introduces new types of defects (stochastic defects, resist roughness) that must be detected and corrected. Gate-all-around (GAA) transistor architectures at 2nm further increase metrology complexity because the 3D transistor structure requires measurement at multiple angles and depths. KLA's optical metrology tools (overlay, CD-SEM, film thickness) capture an increasing share of the measurement workflow at each new node. High-NA EUV, expected to enter volume production in the 2027-2028 timeframe, will further increase process control requirements because the tighter tolerances demand more precise measurement and inspection.